Pierce-gate quartz oscillator worksheet
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Pierce-gate quartz oscillator worksheet
Doh! Rookie mistake... Of course, in a shunt case like RB, no resistor means RB = infinity (by oppostion to a series case like RS, where no resistor means RS = 0 Ω, or a link...). Outside math, the concept of infinity being of no use to us, the sentence should simply read:
" In the case of microcontroller or ASIC ICs, RB may be redundant as it is already embedded in the IC: RB should then be left out."
Thank you, Ivan, for picking it up!
ARB
" In the case of microcontroller or ASIC ICs, RB may be redundant as it is already embedded in the IC: RB should then be left out."
Thank you, Ivan, for picking it up!
ARB
arb-92- Posts : 4
Join date : 2018-02-21
Re: Pierce-gate quartz oscillator worksheet
Hi Arb,
thank you for your effort and kind giving its results for free use. I have one small correction only. You wrote
" In the case of microcontroller or ASIC ICs, RB may be redundant as it is already embedded in the IC.
Then, RB = 0 Ω."
This would short the input and output of the gate. IMHO RB must be infinity in this case (i.e. no external resistor is needed).
BR from Ivan
thank you for your effort and kind giving its results for free use. I have one small correction only. You wrote
" In the case of microcontroller or ASIC ICs, RB may be redundant as it is already embedded in the IC.
Then, RB = 0 Ω."
This would short the input and output of the gate. IMHO RB must be infinity in this case (i.e. no external resistor is needed).
BR from Ivan
Ivan- Posts : 788
Join date : 2012-11-25
Age : 64
Location : Praha, Czechia
Pierce-gate quartz oscillator worksheet
Hello,
For your perusal, please find herewith a link to an Excel spreadsheet giving preliminary design values for the passive components associated with a Pierce-gate quartz oscillator, today the prevailing clocking circuit for digital ICs.
The complexity of the non-linear dynamics at stake usually makes an iterative (trial and error...) process almost mandatory for more advanced optimization, but hopefully those design values are a good starting (working) point.
http://213.114.131.21/draw/pierce-gate-osc-calc.xls
Also given herewith is a link to a work document explaining the logic behind those design values (hopefully...), and is sampled from my reading notes while researching the subject.
http://213.114.131.21/draw/quartz-ii.doc
Feel free to use the worksheet, provide comments and eventually suggest corrections when warranted. Thanks!
Best,
ARB
For your perusal, please find herewith a link to an Excel spreadsheet giving preliminary design values for the passive components associated with a Pierce-gate quartz oscillator, today the prevailing clocking circuit for digital ICs.
The complexity of the non-linear dynamics at stake usually makes an iterative (trial and error...) process almost mandatory for more advanced optimization, but hopefully those design values are a good starting (working) point.
http://213.114.131.21/draw/pierce-gate-osc-calc.xls
Also given herewith is a link to a work document explaining the logic behind those design values (hopefully...), and is sampled from my reading notes while researching the subject.
http://213.114.131.21/draw/quartz-ii.doc
Feel free to use the worksheet, provide comments and eventually suggest corrections when warranted. Thanks!
Best,
ARB
arb-92- Posts : 4
Join date : 2018-02-21
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