20MHz PLL multiplied to 100MHz?
2 posters
Re: 20MHz PLL multiplied to 100MHz?
by dare4444 Wed Dec 13, 2023 5:33 pm
Thank you Ivan for clearing my doubts. In my past experiments the PLL loop filter supplied 4.8V to the 16V zener diode when locked with no modulation. Audio was very clear with low distortion not audible to human ear.Ivan wrote:Hi,
I do not expect any AF degradation provided that the used part of voltage-to-frequency characteristic can be considered linear. Nonlinearities will be emphasized by the frequency multiplication. Please keep in mind, that the frequency shift will be also multiplied by 5, so you do not need too much capacity of the diode. I suppose the DC bias will be delivered through the PLL filter.
The output power should be enough for further amplification.
VBR from Ivan
I'll be posting the results very soon. Prescaler chip finally eliminated and 74HC04 could replace CD4069.
dare4444- Posts : 427
Join date : 2013-03-19
Re: 20MHz PLL multiplied to 100MHz?
by Ivan Wed Dec 13, 2023 8:07 am
Hi,
I do not expect any AF degradation provided that the used part of voltage-to-frequency characteristic can be considered linear. Nonlinearities will be emphasized by the frequency multiplication. Please keep in mind, that the frequency shift will be also multiplied by 5, so you do not need too much capacity of the diode. I suppose the DC bias will be delivered through the PLL filter.
The output power should be enough for further amplification.
VBR from Ivan
I do not expect any AF degradation provided that the used part of voltage-to-frequency characteristic can be considered linear. Nonlinearities will be emphasized by the frequency multiplication. Please keep in mind, that the frequency shift will be also multiplied by 5, so you do not need too much capacity of the diode. I suppose the DC bias will be delivered through the PLL filter.
The output power should be enough for further amplification.
VBR from Ivan
Ivan- Posts : 794
Join date : 2012-11-25
Age : 64
Location : Praha, Czechia
Re: 20MHz PLL multiplied to 100MHz?
by dare4444 Wed Dec 13, 2023 4:53 am
Ivan,
I may have to tweak the LPF to remove the spur at 140MHz.
+7dBm output is then okay. I'll build this circuit soon. The multiplication shouldn't degrade the audio quality of PLL, right? That's my only concern. Yes, I'll have to build it to test the idea. CD4069 should work at 20MHz and the 16V zener may have to be replaced by a 1N4007 or maybe several zeners in parallel to increase its usable capacitance. CD4069 is configured as a Franklin oscillator.
I may have to tweak the LPF to remove the spur at 140MHz.
+7dBm output is then okay. I'll build this circuit soon. The multiplication shouldn't degrade the audio quality of PLL, right? That's my only concern. Yes, I'll have to build it to test the idea. CD4069 should work at 20MHz and the 16V zener may have to be replaced by a 1N4007 or maybe several zeners in parallel to increase its usable capacitance. CD4069 is configured as a Franklin oscillator.
dare4444- Posts : 427
Join date : 2013-03-19
Re: 20MHz PLL multiplied to 100MHz?
by dare4444 Tue Dec 12, 2023 9:47 am
LtSpice simulation. 8mW @100MHz.Ivan wrote:Hi,
what level of the 5th harmonic do you expect after filtering?
VBR from Ivan
dare4444- Posts : 427
Join date : 2013-03-19
Re: 20MHz PLL multiplied to 100MHz?
by Ivan Tue Dec 12, 2023 8:32 am
Hi,
what level of the 5th harmonic do you expect after filtering?
VBR from Ivan
what level of the 5th harmonic do you expect after filtering?
VBR from Ivan
Ivan- Posts : 794
Join date : 2012-11-25
Age : 64
Location : Praha, Czechia
20MHz PLL multiplied to 100MHz?
by dare4444 Mon Dec 11, 2023 7:03 am
The design is still on paper. Is it a good idea to generate a WBFM signal at 20MHz and then multiply to 100MHz for 100MHz WBFM out? It removes hard to find prescaler chips.
The audio quality will be preserved, I hope.
dare4444- Posts : 427
Join date : 2013-03-19
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